Morning Overview on MSN

Lattice Semiconductor wins a gold cybersecurity award for the first FPGA with post-quantum cryptography baked in

Lattice Semiconductor picked up a gold cybersecurity award in May 2026 for what the company says is the industry’s first ...
Las Vegas Sun

Altera Brings Determinism to Physical AI Systems with Latest Release of FPGA AI Suite

SAN JOSE, Calif.-- (BUSINESS WIRE)--Apr 30, 2026-- ...
Hackaday

Give Your RPi A Cool FPGA Hat

Need additional, custom IO for your Raspberry Pi? Adding an FPGA is a logical way to expand your IO, and allow for high speed digital interfaces. [Eric Brombaugh]’s Icehat adds a Lattice iCE5LP4K-SG48 ...
Datacenter Dynamics

Intel relaunches Altera as standalone FPGA business

Intel has launched a standalone FPGA (field-programmable gate array) business, branding it Altera - after the company it acquired in 2015. The company will sell reconfigurable chips for systems across ...
Semiconductor Engineering

The Case For FPGA Equivalence Checking

Formal Equivalence Checking (EC) has become a standard part of the ASIC development flow, replacing almost all gate level simulation with a rigorous consistency check between pre- and post-synthesized ...
Forbes

Microsoft: FPGA Wins Versus Google TPUs For AI

At the recent Hot Chips conference, three of the world’s largest datacenter companies detailed projects that exploit Field Programmable Gate Arrays (FPGAs) as accelerators for performance-hungry ...
Forbes

Intel’s Chiplet Strategy Accelerates FPGA Development

Although chiplets have recently broken into the semiconductor limelight in a big way, Intel’s Programmable Solutions Group (PSG) has relied on chiplet technology for its Field Programmable Gate Arrays ...
Hackaday

fpga board

The Rasberry Pi Zero is a delightful form factor, with its GIPO and USB and HDMI, but it’s stuck using the same old ARM processor all the time. What if you wanted to change it up with some OpenSPARC, ...
EDN

Resets in FPGA & ASIC control and data paths

Reset is an important mechanism to bring a digital system into a known state. The need for reset is governed by the system design and application, and various data and control paths are designed to ...
Semiconductor Engineering

FPGA Design Tradeoffs Getting Tougher

FPGAs are getting larger, more complex, and significantly harder to verify and debug. In the past, FPGAs were considered a relatively quick and simple way to get to market before committing to the ...